|ARM Technical Support Knowledge Articles|
For JTAG-based debugging, it is necessary to have a very reliable connection between Multi-ICE and the target board because there is no way to detect and correct errors. For this reason it is important to guarantee good signal integrity.
One factor that can limit the maximum cable length is propagation delays. Normally the Multi-ICE unit samples data returning from the target using the same clock as for sending data, TCK. If the propagation delay gets too long then the Multi-ICE unit will sample at the wrong time. This can be resolved by using 'adaptive clocking'. In this mode the target returns a clock (RTCK) and the Multi-ICE will not sample data on TDO, or send further data on TDI, until clocked by this signal.
In an ASIC or ASSP (e.g. ARM based microcontrollers) the TDO and RTCK signals are not typically implemented with a stronger driver than other signals on the device. The strength of these drivers varies from device to device, a fairly common value is 4mA. Most target boards connect these pins on the device directly to the corresponding pins on the Multi-ICE connector.
Over very short lengths of cable, such as the one supplied with Multi-ICE, this type of weak driver is adequate. However, if longer cables are used then the cable becomes harder to drive as the capacitive load increases. When using longer cables it becomes essential to consider the cable as a transmission line and to provide appropriate impedance matching, otherwise reflections will occur.
Multi-ICE has much stronger drivers and they are connected through 100 Ohm series resistors to impedance match with the JTAG cable. The output circuitry of Multi-ICE can easily sink or source over 40mA of current - this is very much better than the typical circuit used at the target end.
With the typical situation at the target end (weak drivers, no impedance matching resistors) you can only expect reliable operation over short cables (approx 20cm). If operation over this length is desired you will need to improve the circuitry used at the target end.
The solution we recommend is to add an external buffer (with good current drive) and a 100 Ohm series resistor for the TDO (and RTCK if used) signals on your target board. Using this technique you should be able to debug over a significantly longer cable, we have seen operation over several metres. Depending on cable length and propagation delays through your buffers, etc. it may still become necessary to use adaptive clocking.
If you are not already using adaptive clocking in your design, RTCK can be generated at the target end by using the TCK signal fed through the same buffer and impedance matching circuit as used for TDO.
If even longer cables are needed, one possible solution would be to buffer the JTAG signals through differential drivers (e.g. RS422) and connect to differential receivers at the remote end using twisted pair cable. Adaptive clocking should be used to allow for propagation delays in the cable/drivers. In theory, reliable operation should be possible over tens of metres using this technique.
Reducing the JTAG clock speed in the Multi-ICE server will lessen some, but not all, of the problems associated with long cables. If reducing the speed of downloading code and reading memory in the debugger is not a significant problem, you may wish to experiment with lowering this clock speed if you encounter problems.
Article last edited on: 2008-09-09 15:47:29
Did you find this article helpful? Yes No
How can we improve this article?