ARM Technical Support Knowledge Articles

How should ARM7TDMI/ARM9TDMI pins be driven to test the core using serialised test vectors via JTAG?

Applies to: ARM7TDMI, ARM9TDMI


When using the serial JTAG vectors to test the ARM7TDMI core, the signals MCLK, TBE and nRESET need to be driven to special states, as follows:

  • MCLK - LOW
  • TBE - HIGH (this is mandatory only for the 'ice' test, in fact).

When testing the ARM9TDMI core, only DBGEN needs to be asserted to allow debugging via the JTAG port to take place.

You must also ensure that the external system is isolated from the ARM during the serial test to remove the possibility of bi-directional signals clashing on the data bus.

The document Serial Test Procedure explains the serial test procedure in detail.

The testing of ARM's cached cores, e.g. ARM720T, ARM920T, ARM922T and ARM940T cannot be done using serialised test vectors. The reason for this is that the size of the test vectors would be prohibitively large.

See also:

Article last edited on: 2008-09-09 15:47:36

Rate this article

Disagree? Move your mouse over the bar and click

Did you find this article helpful? Yes No

How can we improve this article?

Link to this article
Copyright © 2011 ARM Limited. All rights reserved. External (Open), Non-Confidential