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Applies to: ARM7TDMI
The production test vectors are not designed for 'at-speed' testing of the ARM cores. They are designed to give high fault coverage. The ARM cores sample inputs and change outputs on both the rising and falling clock edges. As the clock periods gets shorter, outputs start to change in the next cycle. This problem is made worse on a tester because there is the possibility of having a write followed by a read, causing contention on the data bus.
Therefore it is not possible to use these vectors to carry out speed testing of the ARM cores. However it may be possible to reduce the cycle time and scale the test vectors to a higher frequency (to reduce test time, for example), but this will not be the actual maximum operating frequency of the ARM7TDMI core.
ARM recommends the core is characterized using ARM's pre-fab characterization simulations in combination with measurements on a test chip using special characterization patterns.
Article last edited on: 2008-09-09 15:47:36
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