|ARM Technical Support Knowledge Articles|
Applies to: ARM720T
In many systems neither signal is used.
nOPC tells you what the 7TDMI core inside the 720T is doing on a particular cycle. The reason why you might want to know that is if you are building a coprocessor, you have to follow the instruction pipeline of the ARM - each time there is a cycle on CPCLK, if nOPC is low (indicating an instruction fetch), the value off CPDATA should go into the coprocessors instruction pipeline.
Apart from coprocessor implementation, this signal might also be useful when trying to trace exactly what instructions the core is executing.
BPROT is generated inside the bus interface unit and does not always come directly from nOPC. In the case of a data write, for example, the write could be handled by the write buffer while the 7TDMI core was executing a completely different instruction, many cycles after it executed the store. There are some problems associated with using BPROT - for example, if a cache linefill takes place, it is conceivable that the same line might contain both code & data (inline data, such as literal pool values, is a fairly common assembler technique). There is no way that the bus interface unit could spot when this happens.
Note also that BPROT will always indicate a privileged mode access whenever a write takes place - as the write buffer effectively decouples the bus from the core activity, we do not know if writes were privileged mode or user, so they are always indicated as privileged mode.
Article last edited on: 2008-09-09 15:47:36
Did you find this article helpful? Yes No
How can we improve this article?