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Applies to: ARM720T
You need a behavioral block (Fclkgen) which drives FCLK during the ARM720T test. FCLK has to be clocked at the appropriate points in the test sequence, depending upon which AMBA test mode is used by that pattern. If you don't have this code, please let us know whether you want VHDL or Verilog and whether it's for AMBA ASB or AHB, so that the correct files can be delivered. If FCLKGEN is not used to drive FCLK, the tests will not pass. This means that either a special on-chip circuit must be used to generate FCLK, for test purposes, or, more commonly, that FCLK must be able to be driven by the external tester when testing the core.
Article last edited on: 2008-09-09 15:47:36
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