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Are there ARM720T core test vectors in JTAG serial test format?

Applies to: ARM720T

Answer

No. We don't have such vectors. It is possible to test the ARM7TDMI by JTAG, but the number of cycles required to test the ARM720T caches this way is impractically large, so serial test is not an option for the ARM720T. (The RAMs do not have any form of BIST - they must be tested by writing & reading all 0s, all 1s, checkerboard patterns etc.)

The reason is that the ARM720T does not have the boundary scan functionality built into it and there is no direct scan chain access to the cache TAG & RAM cells.

During the design stage of ARM720T we considered that the time taken to implement serial testing would be prohibitively large and so there would be little or no demand for such a feature. Also, without adding the boundary scan logic we were able increase the performance of the ARM720T.

It is not possible to directly test the cache TAGs/RAMs via JTAG.

Essentially, there are only 2 possible ways to test the ARM720T:

  • Parallel vectors. The functional vectors which require access to  all inputs & outputs of the ARM720T - a couple of hundred signals. To use this approach in a real design would require you to bring all of those inputs & outputs off-chip, probably by attaching multiplexers to all of your ASIC I/O.
  • AMBA TIC testing. This is the technique that almost all designs have used for the ARM720T. The ARM720T already has an ASB interface, so the only overhead is including a TIC.

Article last edited on: 2008-09-09 15:47:37

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