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Applies to: ARM720T
The warnings from the model simply indicate that the interrupt was too close to the clock edge to have been recognised on that particular clock cycle. Inside the ARM720T, the ARM7TDMI ISYNC signal is tied off to indicate asynchronous inputs, so interrupts will also be synchronized internally (and always have a 1 cycle penalty for synchronization).
Article last edited on: 2008-09-09 15:47:37
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