Why is the ARM720's Dhrystone MIPS rating lower than that of the ARM7TDMI?

When comparing the ARM720T vs. ARM7TDMI (or indeed any cached vs non- cached processor), you need to specify the memory system. If the two are running at the same clock speed and all of the memory in the ARM7TDMI based system is zero wait state and no other devices are sharing the memory bus, then naturally the ARM7TDMI will show better performance. A cached system has certain overheads - it will read lines of memory of fixed line length, for example, even if the processor does not actually require all of the words in the line. A cache will only improve system performance if there are areas of memory whose contents are repeatedly accessed (i.e data in that memory is re-used or the instructions stored in that memory are multiply executed i.e loops or repeatedly called functions). Only if that memory is slow or if the bus is shared with other bus masters will having a local copy (within the cache) of memory contents provide any performance boost to the processor.

See also:

• How does the interrupt handling latency of the ARM720T compare with ARM7TDMI?
• Does the ARM720T with the cache disabled behave like an ARM7TDMI?