|ARM Technical Support Knowledge Articles|
The test strategy for ARM soft IP is scan/ATPG, plus BIST for memories. Scan insertion is normally done during synthesis, ARM provide synthesis scripts for this.
An ARM generic BIST controller is usually supplied, this can be substituted for a proprietary BIST controller if required.
TIC testing is not applicable to soft cores and only applies to hard cores
Article last edited on: 2008-09-09 15:47:43
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