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What cache sizes can be used in the ARM926EJ-S Macrocell?

Applies to: ARM926EJ-S

Answer

Applies to: ARM926EJ-S

In the ARM926EJ-S, cache sizes from 4-128 KBytes are supported. Cache sizes must be a power of two.

You must have at least 4KBytes of Instruction and Data Cache, it is no problem to have different Instruction/Data cache sizes.

If you don't need caches, this is not supported by the ARM926EJ-S (caches are required by the Memory Management Unit), you could use an ARM946E-S (this uses a Memory Protection Unit), a cached processor that supports 0KB caches, or the ARM966E-S or ARM968E-S which are compact cores that provide Tightly Coupled Memory support only.

See also:

Article last edited on: 2008-09-09 15:47:43

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