Do I need to keep the clock running when the reset line is asserted?
Applies to: ARM1026EJ-S, ARM1136, ARM720T, ARM7EJ-S, ARM7TDMI, ARM7TDMI-S, ARM920/922T, ARM926EJ-S, ARM940T, ARM946E-S, ARM966E-S, ARM968E-S, ARM9TDMI
Answer
Not all registers within the ARM cores are reset. To ensure the processor is reset to a fully defined state the reset line needs to be asserted whilst the clock is running for 5 clock periods; that is 5 rising edges of the clock need to occur whilst the reset is active.
Article last edited on: 2008-09-09 15:47:44
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