ARM Technical Support Knowledge Articles

What AHB transactions will my ARM core generate?

Applies to: ARM1020/22E, ARM1026EJ-S, ARM1136, ARM926EJ-S, ARM946E-S, ARM966E-S, ARM968E-S

Answer

Family

Name

Busy

Single

Incr

Incr4

Incr8

Incr16

Wrap4

Wrap8

Wrap16

Lock

ARM9

926 – Data

 

 

 

 

 

926 – Instr

 

 

 

 

 

 

946

 

 

 

 

966

√1

 

 

 

968

 

 

 

 

ARM10

1020 – Data

 

 

 

 

 

1020 – Instr

 

 

 

 

 

 

1026 – Data

 

√2

√2

 

√2

√2

 

1026 – Instr

 

 

 

 

√2

√2

 

 

ARM11

1136 – Instr

 

 

 

 

 

1136 – DMA

 

 

 

 

 

 

 

 

 

1136 – Rdata

 

 

 

 

1136 – Wdata

 

 

 

 

 

1136 – Periph

 

 

 

 

 

 

 

[1]ARM966 Revision 2 does not generate BUSY transactions, but earlier revisions do

[2]Burst size dependent on configuration of data width. With a 64-bit bus, Wrap4 and Incr4 are used; with a 32-bit bus Wrap8 and Incr8 are used

NB: ARM Ltd recommend that all AHB slave devices are designed to be fully AHB compliant.

Article last edited on: 2008-09-09 15:47:44

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