ARM Technical Support Knowledge Articles

When can a master consider a write transaction complete, when it is trying to determine which write data sources it can interleave?

Applies to: AXI


For the purposes of determining legal write data, in relation to write interleave depth, a master can consider a burst to be completed (on the write data bus) when the last write data for a transaction is transferred. If the slave cannot actually accept the new item of interleaved write data (because it does not free up the internal buffer) until the write response for that transaction is transmitted, then the write data channel will be stalled until the slave can accept the data.

Article last edited on: 2008-09-09 15:47:45

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