|ARM Technical Support Knowledge Articles|
Applies to: ARM968E-S
The DMA has priority.
If both the core and the DMA need to access an odd or even address at the same time, the core will be wait stated. When the DMA moves to the next address then the core will begin and they will be able to access TCM address space simultaneously (one at odd addresses and the other at even addresses).
Article last edited on: 2008-09-09 15:47:46
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