ARM Technical Support Knowledge Articles

Features and performance of ARM Test Chips are subject to change

Applies to: Development Boards


[New 11 July 2006]

The test chips used on ARM Core Tiles and Core Modules are produced by a number of different manufacturers, usually as part of their validation of a new ARM processor layout. They are produced to a specification which describes the package and pinout, but many other details are left largely to the chip manufacturer's requirements for validating their design. Examples of these areas are:

  • TCM (sizes or existence)
  • Cache sizes (if applicable)
  • ETM (size or existence)
  • PLL (existence of)
  • On-chip SRAM (if applicable)
  • Operating speed range of the above five components
  • Silicon process (example: 0.13um, 0.18um)

We obtain small batches of these chips for use in building ARM development boards. This means that over the life of a particular ARM development board (for example the CM1136JF-S or CT926EJ-S), several different test chip types may be fitted to the boards.

Maximum operating speeds

Every chip is tested to ensure that it is functional, before it is soldered to a board. Each manufactured board is also tested to ensure that it can run a selection of test programs, at the board's default operating frequencies. We can generally tell you what these 'typical' frequencies are, although we cannot guarantee any maximum frequency for all or any boards in a batch since the test chips are not speed graded.

True maximum frequencies can only be obtained experimentally, under your specific operating conditions. For instance: Ambient temperature, cache/TCM enabled, Software application complexity. Typical operating frequencies for different chip types are listed in other FAQs, and sometimes in the printed 'Release Notes' sheet that should be included in each product box.

Missing or unusable features

Some of the features listed above may not be present in the chip, or may be physically present but are not in an operable condition. For example, some test chip batches may have no ETM, or non-functional PLLs. Due to the limited quantities of test chips available to us, it is not practical to discard an entire batch due to anomalies of this nature. Such feature differences do not mean that a board is broken, and this is normally documented in the Release Notes sheet that ships with the board. The test chip will always contain a functional ARM processor, which will run at a reasonable speed. If you suspect that a particular element of your test chip is not functioning, please refer to the Release Notes before reporting the board as faulty.

Incompatibility Problems

Certain aspects of the development boards stay fixed, such as the overall system memory map. Problems can arise if a customer orders one or more boards for a project and then decides to order more boards some time later, expecting that the new boards will be identical to the first. Due to the variable nature of some test chip features (as described above), software application incompatibilty can result.

It is not possible for us to keep a stock of boards fitted with every test chip type ever produced, so it is important to obtain sufficient boards at the start of a project if having identical test chips is a requirement for the project. Please see the FAQ: 'Can I specify which test chip I want on my ARM development board?' for further information.

'Development Chips'

Some boards (for example the PB926EJ-S) are built with 'Development Chips' rather than test chips. The difference is that the chip which contains the ARM CPU core (and numerous peripherals) is built to ARM's exact specifications, for example: Internal RAM sizes, Silicon process type, Internal peripheral controllers. These devices are usually manufactured in larger batches, and tend to have a higher consistency in feature/performance specifications than test chips.

Article last edited on: 2009-01-20 11:12:24

Rate this article

Disagree? Move your mouse over the bar and click

Did you find this article helpful? Yes No

How can we improve this article?

Link to this article
Copyright © 2011 ARM Limited. All rights reserved. External (Open), Non-Confidential