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Applies to: AXI
Whilst the ACLKEN signal is not described within the AXI specification document, it has become commonly used as a mechanism of generating a lower speed AXI interface on a component that runs on high frequency clock.
For example, a CPU component that uses a 400 MHz main clock may wish to interface to a system that is running at 200 MHz. Rather than supplying the CPU with two different clocks, the ACLKEN signal is used to indicate which of the higher speed clock edges can be used to generate and sample signals in the lower speed clock domain.
The clock generator that generates the clocks and the ACLKEN signal is responsible for ensuring that the ACLKEN signal is high on the rising clock edge that is coincident with the lower speed rising clock edge.
___ ___ ___ ___ ___ ___ ACLK_FAST __| |___| |___| |___| |___| |___| |___ _______ _______ _______ ACLKEN ____/ \_______/ \_______/ \_____ _______ _______ _______ ACLK_SLOW __________| |_______| |_______|
Components that use the ACLKEN signal must observe the following rules:
Article last edited on: 2008-09-23 16:31:17
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