ARM Technical Support Knowledge Articles

How to generate CLK# pin in PL340 for DDR Memories?

Applies to: PL340 AXI SDRAM Controller


The generation of CLK# can be generated in the PHY for PL340. This can be done as an RTL assignment or by instantiating an inverter cell.

Article last edited on: 2008-09-09 15:47:52

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