|ARM Technical Support Knowledge Articles|
Applies to: Versatile Logic Tiles
[new 15 August 2007]
The design of the logic tiles enables the user to stack them on top of each other. Logic tiles are based on one of the largest capacity FPGAs. However, a single FPGA is not always large enough for some designs.
Very complex designs can be split into several blocks (partitioning) and each of the blocks can be synthesized in a separate FPGA.
The logic tile provides the infrastructure to interface the different blocks:
Article last edited on: 2009-01-20 15:11:38
Did you find this article helpful? Yes No
How can we improve this article?