|ARM Technical Support Knowledge Articles|
Applies to: PL08x DMAC (DM & SM)
Why are only BURST requests allowed when performing Memory-to-Peripheral transfers with the DMAC as the flow controller? What if the slave requests DMACSREQ?
With the PL080 as the flow controller, it will have prior knowledge of the amount of data to transfer, i.e. this will have already been programmed into its DMACCxControl register; therefore the peripheral only needs to assert a burst request and the DMAC will transfer bursts when the quantity of data to transfer is greater than the burst size and singles at all other times.
If the peripheral can only accept singles then the burst size in the DMACCxControl register needs to be set to '1'.
If the destination peripheral can only raise DMACSREQ then it can be connected to the DMACBREQ input for the channel and the PL080 will see it as a burst request.
If the peripheral raises only the SINGLE request and this is NOT connected to the DMACBREQ input, then the DMA Controller will wait indefinitely. The solution is to connect the peripheral's SINGLE request to DMACBREQ on the PL080, but configure the PL080 for burst transfers of length '1'. This way, whenever the DMA Controller sees DMACBREQ asserted, it will perform a burst transfer of length 1, in other words, a SINGLE transfer.
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