|ARM Technical Support Knowledge Articles|
Applies to: PL08x DMAC (DM & SM)
Is there a way to know (in the DMAC) how many transfers took place between a start of transfer and a DMALBREQ or DMALSREQ assertion when the Peripheral is the flow controller?
There is no counter within the DMA controller which counts the number of transfers, when in Source or Destination peripheral flow control mode.
In these cases you can calculate the number of transfers by monitoring the start and end addresses and dividing by <source width> or <destination width> as appropriate.
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