|ARM Technical Support Knowledge Articles|
Applies to: AXI
No. For a write transaction, it is a protocol violation to assert BVALID before the last data transfer completes. A master signals the last data transfer by setting WLAST HIGH.
The AMBA AXI Protocol Specification, ARM IHI 0022, states:
a write response must always follow the last write transfer in the write transaction to which the write response relates.
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