ARM Technical Support Knowledge Articles
LT-XC4V (Virtex-4) Knowledge Articles
Knowledge Articles in this section
Are the Virtex-II and Virtex-4 Logic Tiles compatible?
Can I program the Virtex-4 Logic Tile with ProgcCrds for Multi-ICE?
What AXI and AHB example designs are available for the LT-XC4V (Virtex-4) Logic Tile?
What are the LT-XC4V (Virtex-4) Logic Tile I/O connections?
What are the differences between the LT-XC2V (Virtex-II) and LT-XC4V (Virtex-4) Logic Tiles?
What are the types of encryption keys programmed into the Logic Tile?
What is the speed grade of the LT-XC4V (Virtex-4) Logic Tile FPGA?
Where is the encryption key stored in a Logic Tile?
Where is the pin constraint file (UCF) for the LT-XC4V (Virtex-4) Logic Tile FPGA?
Which LT-XC4V (Virtex-4) Logic Tile schematic should I use?
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