3.5.10. TraceEnable Event Register, ETMTEEVR

The ETMTEEVR characteristics are:


Defines the TraceEnable enabling event.

Usage constraints

There are no usage constraints.


This register is available in all ETM implementations.


See the register summary in Table 3.3, and Reset behavior.

Figure 3.13 shows the ETMTEEVR bit assignments.

Figure 3.13. ETMTEEVR bit assignments

To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.

Table 3.19 shows the ETMTEEVR bit assignments.

Table 3.19. ETMTEEVR bit assignments


Defined in ETM architecture versions




v1.0 and later

TraceEnable event

Using ETM event resources describes how you define a TraceEnable event.

Copyright © 1999-2002, 2004-2009, 2011 ARM Limited. All rights reserved.ARM IHI 0014Q