3.5.13. FIFOFULL Region Register, ETMFFRR

The ETMFFRR characteristics are:

Purpose

Defines the regions where FIFOFULL can be asserted, specifying the MMDs and address comparators used for FIFOFULL region control.

Usage constraints

There are no usage constraints.

Configurations

This register is available in all ETM implementations that support the FIFOFULL stalling function as indicated by bit [23] of the ETMCCR See Configuration Code Register, ETMCCR.

Attributes

See the register summary in Table 3.3, and Reset behavior.

Figure 3.15 shows the ETMFFRR bit assignments.

Figure 3.15. ETMFFRR bit assignments

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Table 3.21 shows the ETMFFRR bit assignments.

Table 3.21. ETMFFRR bit assignments

Bits

Version [a]

Description

[31:25]-Reserved.

[24]

v1.0

Include/exclude control. The possible values of this bit are:

0

Include. The resources specified in bits [23:0] indicate the regions where FIFOFULL can be asserted. When outside these regions, FIFOFULL cannot be asserted.

1

Exclude. The resources specified in bits [23:0] indicate the regions where FIFOFULL cannot be asserted. When outside these regions FIFOFULL can be asserted.

[23:8]

v1.0

When a bit is set to 1, it selects memory map decode 16-1 as defining regions where FIFOFULL can or cannot be asserted, depending on the setting of bit [24]. For example, bit [8] set to 1 selects MMD 1.

[7:0]

v1.0

When a bit is set to 1, it selects address range comparator 8-1 for specifying regions where FIFOFULL can or cannot be asserted, depending on the setting of bit [24]. For example, bit [0] set to 1 selects address range comparator 1.

[a] The first ETM architecture version that defines the field.


Note

  • To enable FIFOFULL anywhere in memory, set bit [24] of the ETMFFRR to 1 and set all other bits to 0.

  • The ETMFFRR does not affect data suppression. See Data suppressed packet for more information about data suppression.

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