3.5.11. TraceEnable Control 1 Register, ETMTECR1

The ETMTECR1 characteristics are:

  • enables the start/stop logic

  • determines whether the resources specified in ETMTECR1 and ETMTECR2 are used for include or exclude control

  • specifies the address range comparators used for include/exclude control

  • specifies the memory map decodes (MMDs) used for include/exclude control.

Usage constraints

There are no usage constraints.


This register is available in all ETM implementations.


See the register summary in Table 3.3, and Reset behavior.

Figure 3.14 shows the ETMTECR1 bit assignments.

Figure 3.14. ETMTECR1 bit assignments

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Table 3.20 shows the ETMTECR1 bit assignments.

Table 3.20. ETMTECR1 bit assignments


Version [a]





Trace start/stop enable. The possible values of this bit are:


Tracing is unaffected by the trace start/stop logic.


Tracing is controlled by the trace on and off addresses configured for the trace start/stop logic. See The trace start/stop block.

The trace start/stop resource (resource 0x5F) is unaffected by the value of this bit.



Include/exclude control. The possible values of this bit are:


Include. The specified resources indicate the regions where tracing can occur. When outside this region tracing is prevented.


Exclude. The resources, specified in bits [23:0] and in the ETMTECR2, indicate regions to be excluded from the trace. When outside an exclude region, tracing can occur.



When a bit is set to 1, it selects memory map decode 16-1 for include/exclude control. For example, bit [8] set to 1 selects MMD 1.



When a bit is set to 1, it selects address range comparator 8-1 for include/exclude control. For example, bit [0] set to 1 selects address range comparator 1.

[a] The first ETM architecture version that defines the field.

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