3.5.29. Counter Reload Event Registers, ETMCNTRLDEVRn

The ETMCNTRLDEVR characteristics are:


Defines the event that causes the corresponding counter to be reloaded with the value held in the corresponding ETMCNTRLDVR.

Usage constraints

Each ETMCNTRLDEVR is used with a corresponding ETMCNTRLDVR, ETMCNTENR, and ETMCNTVR. See About the counter registers.


The number of ETMCNTRLDEVRs

  • is implementation defined

  • is specified by ETMCCR bits [15:13]

  • can be zero.

See Configuration Code Register, ETMCCR.

Unimplemented ETMCNTRLDEVRs are RAZ/WI.


See the register summary in Table 3.3, and Reset behavior.

Figure 3.28 shows the ETMCNTRLDEVR bit assignments.

Figure 3.28. ETMCNTRLDEVR bit assignments

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Table 3.39 shows the ETMCNTRLDEVR bit assignments.

Table 3.39. ETMCNTRLDEVR bit assignments


Defined in ETM architecture versions




v1.0 and later

Counter reload event

Each ETMCNTRLDEVR has the same bit assignments.

Using ETM event resources describes how you define a counter reload event.

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