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| Home > Programmers’ Model > Detailed register descriptions > About the Context ID comparator registers, ETMv2.0 and later | |||
From ETMv2.0, an ETM can implement up to three Context ID comparators. The ETM implements a value register for each Context ID comparator, and a single mask register that applies to all of the Context ID comparators. Table 3.45 shows these registers:
Table 3.45. Context ID comparator registers
| Description | Register number | Offset [a] |
|---|---|---|
| Context ID Comparator Value 1 Register, ETMCIDCVR1 | 0x06C | 0x1B0 |
| Context ID Comparator Value 2 Register. ETMCIDCVR2 | 0x06D | 0x1B4 |
| Context ID Comparator Value 3 Register. ETMCIDCVR3 | 0x06E | 0x1B8 |
| Context ID Comparator Mask Register, ETMCIDCMR | 0x06F | 0x1BC |
[a] When accessed in a memory-mapped scheme, the register offset is always (4 x (Register number)). | ||
These registers are write-only, although in architecture versions 3.1 and later they are read/write when bit [11] of the ETMCCER is set to 1. See Configuration Code Extension Register, ETMCCER, ETMv3.1 and later.
The following sections describe these registers: