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ETMv2 generates Trace FIFO Offsets (TFO) to enable the decompressor to synchronize the pipeline status (PIPESTAT) and FIFO output (TRACEPKT) signals.
There are two reasons for generating a TFO:
trace is first enabled
periodic synchronization.
Periodic synchronization occurs as soon as possible after the synchronization counter reaches zero, when the current PIPESTAT is IE (Instruction Executed).
When the synchronization counter reaches zero it sets an internal flag to indicate that a periodic TFO is required, and immediately resets. If a periodic TFO does occur before the counter next reaches zero, the ETM must output a TFO with reason code 2, overflow. Some trace is lost as a result of this. This condition is very unusual and usually indicates that the processor is in an infinite loop.
When a TFO is generated, the following occur in that cycle:
A PIPESTAT of TD is output on PIPESTAT[3:0]:
If the TFO occurs when trace is turned on, no functional PIPESTAT is implied and the PIPESTAT for the first traced instruction is given in the following cycle. The header of a TFO caused by turning trace on includes a reason code of b01, b10, or b11.
If the TFO occurs for normal synchronization while trace is already enabled, an existing PIPESTAT of IE is implied. In this case the TFO header includes the reason code b00.
The value of the TFO is output on the TRACEPKT pins. The TFO value represents a count of the number of bytes in the FIFO, and indicates where the TFO packet can be found on TRACEPKT. For more information see TFO values.
Several bytes of data, known as a TFO packet, are placed in the FIFO. The TFO packet eventually appears on the TRACEPKT pins. For more details of TFO packets, see General TFO packet structure.
TCDs can discard TD (Trace Disabled) cycles where TRACEPKT[0] = 0. If TRACEPKT[0] is asserted, the TFO value is output on TRACEPKT[7:1] (lower bits on TRACEPKT[7:4]). The range of TFO encodings is shown in Table 6.4.
Table 6.4. TFO encodings
| TRACEPKT[3:0] | Description |
|---|---|
| bXXXXXXX0 | Trace disabled, not cycle-accurate |
| bXXXX0111 | Trace disabled, cycle-accurate |
| bXXXX1001 | TFO value 0-15 (TRACEPKT[7:4] + 0) |
| bXXXX1011 | TFO value 16-31 (TRACEPKT[7:4] + 16) |
| bXXXX1101 | TFO value 32-47 (TRACEPKT[7:4] + 32) |
| bXXXX1111 | TFO value 48-63 (TRACEPKT[7:4] + 48) |
| bXXXX0001 | TFO value 64-79 (TRACEPKT[7:4] + 64) |
| bXXXX0011 | TFO value 80-95 (TRACEPKT[7:4] + 80) |
| bXXXX0101 | Reserved |
The following formula generates the TFO values in Table 6.4:
TRACEPKT[7:4] = TFO[3:0]
TRACEPKT[3] = !TFO[6]
TRACEPKT[2:1] = TFO[5:4].
Example 6.1 shows how to calculate the value of a TFO.
Example 6.1. Calculating a TFO value
Suppose that there is one byte left in the FIFO before the TFO packet header (that is, the TFO value is b0001). Using the TFO formula, the mapping of TRACEPKT[7:1] to TFO is:
7 6 5 4 3 2 1
3 2 1 0 !6
5 4
So a TFO value of b0000001 is output on the TRACEPKT[7:1] pins as 0001100. TRACEPKT[0] must be asserted, so the full TRACEPKT[7:0] output is 00011001.
This example TFO value is used in Table 6.5.
A TFO packet typically consists of:
A TFO header byte, see TFO packet headers
A full instruction address, see Instruction tracing with ETMv2
The current Context ID, see Context ID tracing.
When using a 4-bit port, the lower 4 bits are output on TRACEPKT on the cycle of the TD (Trace Disabled), and the upper 4 bits on the following cycle. The pipeline status is TD for the first cycle only.
If a trigger occurs on the same cycle as a TFO TD cycle, the PIPESTAT is TR (Trigger), and TRACEPKT[3:0] = 0111 (TD). This is the only way a trigger can have a replacement PIPESTAT of TD. If a trigger occurs when the PIPESTAT would have been a non-TFO TD, the replacement PIPESTAT is WT (Wait). The offset is output on the following cycle, or the following two cycles in the case of a 4-bit port.
If a trigger occurs on the cycle in which the upper 4 bits of the offset are being output on a 4-bit port, the replacement PIPESTAT is output, and the upper 4 bits of the offset are output on the following cycle.
If a trigger occurs on the same cycle as a gap nibble following a TFO on a 4-bit port, the replacement PIPESTAT is output and the gap nibble is output on the following cycle. Mid-byte TFO outputs describes the gap nibble.
The trigger can occur only once per trace run.
If a TFO occurs mid-byte in the 4-bit trace packet port configuration, a gap nibble is inserted in the TRACEPKT[3:0] output stream. TFO values specify synchronization in terms of bytes rather than nibbles. The gap nibble ensures that the current top of the FIFO, pointed to by the TFO value, is always byte-aligned.
The value of the gap nibble is always 0x6.
The example sequence in Table 6.5 shows how the PIPESTAT[3:0] and TRACEPKT[3:0] signals change when a TFO occurs between data nibbles.
Table 6.5. Example signal sequence for a mid-byte TFO
| Trace operation | PIPESTAT[3:0] | TRACEPKT[3:0] |
|---|---|---|
Data 0xABCD is
output to TRACEPKT[3:0] | ID | b1101 (data nibble 0x---D) |
| IE | b1100 (data nibble 0x--C-) | |
| WT | b1011 (data nibble 0x-B--) | |
| TFO occurs, TFO value output begins | TD (originally IE) | b1001 |
| IE | b0001 | |
| Gap nibble is inserted immediately following TFO value | WT | b0110 |
| Remaining data nibble is output | IN | b1010 (data nibble 0xA---) |
| TFO packet output begins | DN | TFO header [3:0] |
The TFO value output indicates one byte remaining. That byte
is made up of the gap nibble followed by nibble 0xA---.
FIFO output is delayed until the complete TFO value (and extra nibble, if required) have been output on TRACEPKT[3:0].
In cases where synchronization is not required, the decompressor must be aware that the gap nibble appears on TRACEPKT[3:0]. The decompressor must always expect this extra nibble when a TFO is generated on an odd nibble regardless of whether the TFO is because of synchronization or because trace has been enabled.