6.4.3. Load Miss packets

ETMv2 supports processors with nonblocking data caches. A nonblocking data cache enables instructions, including memory instructions, to execute underneath a single outstanding miss. This means that the data cache can return data to the processor out of order.

Load requests that miss in the data cache are handled by the out-of-order placeholder and out-of-order data header types.

Load Miss Occurred

When a load miss occurs, an out-of-order placeholder packet is placed in the FIFO instead of a normal data packet. The packet includes the data address if both of the following conditions are satisfied:

  • Data address tracing is enabled

  • The miss does not occur in the middle of an LSM that has already output data packets. This can be determined from the A bit.

Otherwise, the packet comprises only the out-of-order placeholder header byte.

When an out-of-order placeholder packet is read, the corresponding data packet is output later in the trace. Decompression software must be able to identify and correctly process this situation.

Load Miss Data

When load miss data is returned, the Load Miss Data packet, comprising the Load Miss Data header byte and the data value, is placed in the FIFO.

A Load Miss Data packet never includes a data address.

Out-of-order miss data

Some processors might return miss data out of order. A Load Miss Data packet always corresponds to the most recent Load Miss Occurred packet with the same TT tag value.

If the decompressor receives an unexpected Load Miss Data packet (that is, a Load Miss Data packet is given without a pending Load Miss Occurred packet with the same TT tag), it must be ignored. If trace is disabled before the outstanding miss data is returned, this data item is placed in the FIFO with a DW (Wait with Data) PIPESTAT as soon as it is available.

Rules for generation of Load Miss trace packets

These rules do not affect decompression, but describe how load misses are handled by the ETM.

Load Miss Occurred packets are placed in the FIFO if TraceEnable and ViewData are active at the time of the load miss, in the same way as Normal Data packets.

Load Miss Data packets are placed in the FIFO if and only if the corresponding out-of-order placeholder packet was traced, with the following exceptions:

  • Load Miss data might be missing following overflow, if the Load Miss Occurred packet was placed in the FIFO before the overflow occurred.

  • Load Miss data might be missing following restart from debug, if the Load Miss Occurred packet was placed in the FIFO before the entry to debug state.

  • Load Miss data might be missing following a processor reset, if the Load Miss Occurred packet was placed in the FIFO before the reset occurred.

  • Load Miss data might be missing if it is returned in the same cycle as a Non-periodic TFO. This is because of FIFO bandwidth limitations. A periodic TFO must be delayed if it would cause the loss of an out-of-order data packet.

A Load Miss Data packet is never output without a corresponding Load Miss Occurred packet. However, unpaired Load Miss Data packets might be observed at the beginning of the captured trace, if the original Load Miss Occurred packets have been lost.

64-bit loads

When a miss occurs on a 64-bit load value, two Load Miss packets are placed in the FIFO in the same cycle. The decompressor must recognize that these two misses are for a single 64-bit value because both packets have the same tag value and they are consecutive. As with Normal Data packets, the data address is present only with the first Load Miss Occurred packet, and is not present at all if the miss occurs in the middle of an LSM that has already output data packets.

When 64-bit Load Miss data is returned, it is always returned as two separate Load Miss Data packets given in the same cycle. Both packets have the same miss tag, and are consecutive.

Note

It is possible to detect 64-bit Load Miss packets by checking for two packets with the same tag on the same cycle. However, to ensure compatibility with the mechanism used in ETMv3, ARM recommends that the decompressor must check for two consecutive packets with the same tag value.

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