Embedded Trace Macrocell Architecture Specification: 3.5.51. OS Lock Access Register, ETMOSLAR, ETMv3.3 and later

3.5.51. OS Lock Access Register, ETMOSLAR, ETMv3.3 and later

The ETMOSLAR characteristics are:

Purpose: Locks access to the ETM trace registers.
Usage constraints: This is a write-only register.
Configurations: This register is only available in ETMv3.3 or later.
Attributes: See the register summary in Table 3.3 and Reset behavior.

Figure 3.46 shows the ETMOSLAR bit assignments.

Figure 3.46. ETMOSLAR bit assignments

Table 3.60 shows the ETMOSLAR bit assignments.

Table 3.60. ETMOSLAR bit assignments

Bits	Version ^[a]	Description
[31:0]	v3.3	Write `0xC5ACCE55` to this field to lock the ETM trace registers. Write any other value to this field to unlock the ETM trace registers.
^[a]The first ETM architecture version that defines the field.

Bits

Version ^[a]

Description

[31:0]

v3.3

Write 0xC5ACCE55 to this field to lock the ETM trace registers.

Write any other value to this field to unlock the ETM trace registers.

^[a]The first ETM architecture version that defines the field.

When the ETM trace registers are locked, any attempt to access the locked registers returns a slave-generated error response. See Power Down support for more information.

Accessing this register, to lock or unlock the ETM trace registers, also resets the internal save/restore counter. See OS Save and Restore Register, ETMOSSRR, ETMv3.3 and later for information about this counter. You must lock the ETM trace registers before you perform an OS save or restore. This prevents any changes to the trace registers during the save or restore process.

The ETMOSLAR is write-only. To find out whether the ETM trace registers are locked you read the ETMOSLSR. See OS Lock Status Register, ETMOSLSR, ETMv3.3 and later.

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