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| Non-Confidential | ID101211 |
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An ETM implements controls on accesses to the ETM registers. These controls depend on the register access model implemented by the ETM. The usual access models are summarized in ETM register access models.
An ETM might be part of a system that is implemented with multiple power domains. A typical implementation might implement two domains that can be independently powered down, for example:
the core power domain powers the processor that is being traced, and contains most of the ETM logic, including the trace registers
a debug power domain contains the trace output logic, including the programming interface or interfaces.
However, the system that includes the ETM might be implemented in a single power domain. An implementation of this type is called a SinglePower system.
The access controls on memory-mapped accesses to ETM registers depend on whether the system is implemented with multiple power domains, or as a SinglePower system.
If your ETM is accessed using an ARM Debug Interface v5, see the access permissions descriptions in the ARM Debug Interface v5 Architecture Specification.
The types of access that can be made to the ETM registers are described in Access types. The access permissions that control ETM register accesses, and restrictions on ETM register accesses, are described in:
| Copyright © 1999-2002, 2004-2009, 2011 ARM Limited. All rights reserved. | ARM IHI 0014Q |
| Non-Confidential | ID101211 |
| PDF version | |
| Home > Programmers’ Model > About the access permissions for ETM registers |