7.5.1. Support for a large number of exceptions

The ARMv7-M architecture supports 15 standard exceptions and up to 496 interrupts, controlled by an NVIC. ETMv3.4 introduces an extension to the branch with exception packet format, that permits each of these exceptions to be identified and traced uniquely. This extension is described in Extended Exception handling in Instruction-only trace.

Copyright © 1999-2002, 2004-2009, 2011 ARM Limited. All rights reserved.ARM IHI 0014Q