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| Non-Confidential | ID101211 |
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When the first data transfer associated with an LSM is
traced, a Normal data packet, or an Out-of-order placeholder packet,
is placed in the FIFO. If data address tracing is enabled this packet
includes the data address. All subsequent data transfers for that LSM place
a packet in the FIFO according to the following rules:
If a subsequent data transfer is to be traced, a Normal data packet, or Out-of-order placeholder packet is traced, normally without an address. For more information, see The A bit.
If a subsequent data transfer is not to be traced, a Value not traced packet is placed in the FIFO for that transfer. For more information, see Value not traced packet.
When data address tracing is enabled, the trace
packets for all of the subsequent data transfers do not normally include
the data address, because the addresses of the LSM transfers
are sequential.
Exceptions to this are:
For a SWP or SWPB instruction
where the addresses for the two data transfers are not sequential.
On some processors, for an LDM instruction
that includes the PC in its registers list. Some processors transfer
the PC before the other addresses, and this results in data transfers
with non-sequential addresses.
If data address tracing is enabled, and a data transfer for
an LSM is not sequential to the previous transfer for that LSM,
the trace packet for the transfer includes the data address.
A compiler can combine adjacent loads or stores into an LSM to
speed up execution. In ETMv1, data tracing can be enabled only at
the beginning of a Load/Store Multiple (LSM)
instruction. ETMv2 and ETMv3 can partially trace an LSM and
output only the data values that match the filtering criteria. For
example, the ViewData setting
might match only from the third word of the LSM. In
this case this third transfer is the first transfer traced for the LSM,
and if data address tracing is enabled the trace packet includes
the data address of the third word of the LSM.
For more information about tracing LSMs in data-only
mode see Tracing LSM instructions in data-only
mode.
See Load/Store Multiple (LSM)
instructions for
a list of the LSM instructions.
| Copyright © 1999-2002, 2004-2009, 2011 ARM Limited. All rights reserved. | ARM IHI 0014Q |
| Non-Confidential | ID101211 |
| PDF version | |
| Home > ETMv3 Signal Protocol > Data tracing > Tracing LSMs |