4.12. Wait For Interrupt and Wait For Event

Processors might implement either or both of:

If implemented, these mechanisms enable the processor to execute a WFI or WFE instruction and then stop execution until an interrupt or event occurs. Some systems might stop the clocks, or save energy by removing power to the processor while waiting for the interrupt or event.

When tracing a processor that halts execution on a WFI or WFE instruction, the ETM behaves as follows:

  1. The WFI or WFE instruction is presented in the trace if TraceEnable is HIGH and instruction tracing is enabled.

  2. The ETM drains its FIFO. When this is complete, it does not generate any more trace. The system must not stop the clocks until the FIFO has drained.

  3. If power is removed or the ETM clock is stopped, it is implementation specific whether cycle accuracy is maintained while waiting for the interrupt or event.

An ETM might stop tracing while the processor is waiting for an interrupt or waiting for an event. In this case, when the interrupt or event occurs tracing restarts, using the normal trace starting sequence. If the ETM FIFO overflowed before the WFI or WFE instruction executed, this must be indicated when tracing restarts. If the time spent waiting for the interrupt or event is short, for example execution restarts before the ETM FIFO has fully drained, the ETM might not restart tracing immediately and trace might be lost.

If an implementation removes power while waiting for the interrupt or event, it must use the OS Save and Restore registers to save the ETM state before power is removed, and to restore the ETM state when power is restored. For more information, see Power Down support.

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