3.2.3. Memory-mapped access, ETMv3.2 and later

ETMv3.2 and later provides optional memory-mapped access. This is usually used in a CoreSight system, and provides all the benefits of coprocessor access, along with other benefits described in The CoreSight Architecture Specification.

Memory-mapped access provides a 4KB address space. Each register occupies 4 bytes, making a total of 1024 registers available in this way. For example, register 0x080 is at offset 0x200 from the base address of the ETM.

The ETM can distinguish between memory-mapped accesses from on-chip software and memory-mapped accesses from a debugger, for example by using the CoreSight Debug Access Port (DAP). Software accesses require the ETM to be first unlocked using the lock registers described in About the lock registers, ETMv3.2 and later.

Copyright © 1999-2002, 2004-2009, 2011 ARM Limited. All rights reserved.ARM IHI 0014Q