Embedded Trace Macrocell Architecture SpecificationETMv1.0 to ETMv3.5
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3.5.76. Component ID2 Register, ETMCIDR2

The ETMCIDR2 characteristics are:

Purpose

Holds byte 2 of the CoreSight preamble information.

Usage constraints

Only bits [7:0] of this register are valid. They must be used with bits [7:0] of the other Component ID registers to obtain the CoreSight Component ID for the ETM macrocell.

Configurations

This register is only available in ETMv3.2 or later.

Attributes

See the register summary in Table 3.3 and Reset behavior.

Figure 3.71 shows the ETMCIDR2 bit assignments.

Figure 3.71. ETMCIDR2 bit assignments

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Table 3.86 shows the ETMCIDR2 bit assignments.

Table 3.86. ETMCIDR2 bit assignments

BitsDefined in ETM architecture versionsValueDescription
[31:8]--Reserved
[7:0]v3.2 and later0x05Reserved

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