Embedded Trace Macrocell Architecture SpecificationETMv1.0 to ETMv3.5
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3.5.32. Sequencer State Transition Event Registers, ETMSQabEVR

The ETMSQabEVR characteristics are:

Purpose

Defines the event that causes the sequencer to transition from state a to state b.

Usage constraints

There are no usage constraints.

Configurations

Whether the ETM includes a sequencer is implementation defined, and is specified by ETMCCR bit [16]. See Configuration Code Register, ETMCCR. If the ETM does not include a sequencer the ETMSQabEVRs are RAZ/WI.

Attributes

See the register summary in Table 3.3, and Reset behavior.

Figure 3.30 shows the ETMSQabEVR bit assignments.

Figure 3.30. ETMSQabEVR bit assignments

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Table 3.42 shows the ETMSQabEVR bit assignments.

Table 3.42. ETMSQabEVR bit assignments

Bits

Defined in ETM architecture versions

Description

[31:17]-Reserved

[16:0]

v1.0 and later

State transition event


Each ETMSQabEVR has the same bit assignments.

Using ETM event resources describes how you define a sequencer state transition event.

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