4.7. Context ID tracing

Context ID tracing is possible only with ETMv1.2 or later.

Note

Context ID was previously known as Process ID. This has been changed to avoid confusion with the Fast Context Switch Extensions (FCSE) field, sometimes referred to as the FCSE Process ID.

Context ID is a 32-bit value accessed through CP15 register c13 that is used to identify and differentiate between different code streams. You can use the Context ID in:

Without the Context ID, software might not be able to determine the instruction address space from which the traced instructions are executing. This can result in incorrect decompression in systems with dynamic memory maps.

Most ARM processors have defined a Context ID register in the system control coprocessor (CP15). See the appropriate Technical Reference Manual for more information.

Where supported, the instruction to write to the Context ID register is:

MCR p15, 0, <Rd>, c13, c0, 1

The instruction to read the Context ID register is:

MRC p15, 0, <Rd>, c13, c0, 1

The ProcIDSize bits (bits [15:14]) of the ETMCR set to 1 the number of bytes of the Context ID bus that are traced. Table 4.3 shows the encoding of these bits.

Table 4.3. ETMCR ProcIDSize bits

Bits [15:14]

Meaning

b00

No Context ID tracing

b01

Context ID bits [7:0] traced

b10

Context ID bits [15:0] traced

b11

Context ID bits [31:0] traced


When Context ID tracing is enabled and the current value of the Context ID Register changes, this is output in the trace. The following situations might cause the Context ID to be traced:

In all these cases, the Context ID might not be traced if the watched part of the Context ID value does not change. For example, if you are only tracing bits [7:0] of the Context ID:

In a system that implements the Security Extensions, if the Non-secure Context ID is changed from the Secure state this is not a change to the current Context ID and is not traced as a Context ID change. In this case, the data for the MCR instruction that changes the Non-secure Context ID is traced as a normal data packet and is subject to the normal rules for tracing coprocessor register transfers.

After a processor reset, the Context ID is unknown. When tracing through a processor reset, the current Context ID is unknown after the Reset exception until it is explicitly changed by writing to the CP15 Context ID Register. If the processor resets the Context ID to a known value, this value is output when Context ID changes, and this new Context ID is used for Context ID comparisons. Otherwise, the ETM uses the last known Context ID for comparisons. If the Context ID changes, the new Context ID is used for comparisons from when the first instruction is executed after the reset.

Copyright © 1999-2002, 2004-2009, 2011 ARM Limited. All rights reserved.ARM IHI 0014Q
Non-ConfidentialID101211