4.8. Debug state

When the ARM processor enters debug state, instruction execution stops. This means that tracing also stops and the FIFO continues to drain until empty.

Instructions executed in debug state are ignored by the ETM.

When the ARM processor exits debug state, tracing restarts if tracing is enabled. The reason code that is generated indicates that the ARM processor has exited from debug state.

If an overflow has occurred on entry into debug state, the debug tools can detect this by reading the ETMSR. For more information see ETM Status Register, ETMSR, ETMv1.1 and later and Processor stalling, FIFOFULL.

For more information about Debug state see:

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