2.6.5. ViewData and filtering the data trace

The trace port uses ViewData to control whether or not the information for a particular data access is output in the trace stream. By reducing the amount of data trace that is output you can reduce the bandwidth required through the trace port and help prevent the on-chip FIFO from overflowing.

In ETMv1.x only, for Load/Store Multiple (LSM) instructions, ViewData is sampled only for the first access of the sequence. This means that either none or all of the words transferred are traced. In these ETM versions, this is necessary for successful decompression, and because the transferred data must be associated with the correct ARM processor registers.

From ETMv2.0, ViewData is sampled for each access.

Note

The ViewData signal is ignored by the ETM if TraceEnable is not asserted.

Data tracing is controlled in a similar way to TraceEnable. Control is provided by:

Figure 2.8. ViewData configuration

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Exclude regions are provided so that you can:

The exclude region might be from a memory map decoder, for example. The exclude region, defined as not being inside the specified address range, is specified as:

(address < range start address) OR (address >= range end address).

You configure the ViewData logic by programming the ViewData registers as Figure 2.9 shows. For more information, see About the ViewData registers.

Figure 2.9. Programming the ViewData logic

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Imprecise ViewData events

If ViewData is imprecise for any reason, any of the following might occur:

  • ViewData might not turn on in time to trace the required data

  • ViewData might not turn off in time to avoid tracing specific data.

ViewData is imprecise if the resource that causes it to change is any of the following:

  • anything selected by the enabling event

  • an address comparator configured for Fetch-stage instruction addresses

  • an address comparator with its Exact match bit set to 1.

    Note

    The Exact match bit is present only from ETMv2.0.

Setting start and stop conditions

In ETMv2.0 and later, you can use the trace start/stop resource with ViewData. The trace start/stop resource is used and selected through the enabling event, as Figure 2.8 shows, but its effect is imprecise.

Note

Although it is permitted, it is unusual for the trace start/stop resource to be enabled in TraceEnable if you are using it to control ViewData.

Filter Coprocessor Register Transfers (CPRT) in ETMv3.0 and later

From ETMv3.0, two bits of the ETMCR, register 0, together control Coprocessor Register Transfer (CPRT) tracing. The two bits are:

  • bit [1], Monitor CPRT

  • bit [19], Filter CPRT.

Table 2.1 shows these bit combinations.

Table 2.1. Filter CPRT and monitor CPRT combinations

ETMCR bits

Monitor CPRT

Filter CPRT

Description
00CPRTs not traced
01unpredictable
10All CPRTs traced
11CPRTs traced only when ViewData is active

See Coprocessor operations for more information on CPRT instructions. See Main Control Register, ETMCR for a full description of the ETMCR.

Operation of ViewData

A data transfer is traced only if all of the following conditions apply:

  • the ViewData enabling event is active

  • the transfer does not match any data address comparator that is selected as a ViewData Exclude resource

  • the instruction that caused the transfer does not match any instruction address comparator that is configured as a ViewData Exclude resource

  • no Memory Map Decode resource that is selected as a ViewData Exclude resource is active

  • at least one of the following conditions applies:

    • ViewData is configured for Exclude-only mode

    • the transfer matches a data address comparator that is selected as a ViewData Include resource

    • the instruction that caused the transfer matches an instruction address comparator that is selected as a ViewData Include resource

    • at least one Memory Map Decode resource that is selected as a ViewData Include resource is active.

ViewData operation examples for Exclude mode

In the following examples, the ViewData enabling event is active and no Memory Map Decode resource is selected as a ViewData Exclude resource:

  • if there is no comparator selected as a ViewData Exclude resource all data transfers are traced

  • if a data transfer matches a data address range comparator that is selected as a ViewData Exclude resource the transfer is not traced

  • if the instruction that caused a data transfer matched an instruction address range comparator that is selected as a ViewData Exclude resource the data transfer is not traced.

ViewData operation examples for Mixed mode

In the following examples, the ViewData enabling event is active and no Memory Map Decode resource is selected as a ViewData Exclude resource:

  • if there is no comparator selected as a ViewData Include resource no data transfers are traced

  • if a data transfer matches a data address range comparator that is selected as a ViewData Exclude resource the transfer is not traced

  • if the instruction that caused a data transfer matched an instruction address range comparator that is selected as a ViewData Exclude resource the data transfer is not traced.

Restrictions on ViewData programming

The following restrictions apply to ViewData programming:

  • If an instruction address comparator has its exact match bit set to 1 you must not use it as a ViewData Include or Exclude resource.

  • If you use a data address comparator that has its exact match bit set to 1 as a ViewData Include or Exclude resource, then tracing is imprecise. This means that:

    • data that you intended to trace might not be traced

    • data that you intended to exclude from the trace might be traced.

ARM Limited recommends that, if a comparator has its exact match bit set to 1, you do not use that comparator to control ViewData.

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