5.2. ETMv1 trace packets

The TRACEPKT pins output packaged address and data information related to the pipeline status. All packets are eight bits in length, irrespective of the number of TRACEPKT pins implemented. The trace packets are output on the TRACEPKT pins as follows:

Four pins

A packet is output over two cycles on TRACEPKT[3:0]. In the first cycle packet [3:0] is output and in the second cycle packet [7:4] is output.

Eight pins

A packet is output in a single cycle on TRACEPKT[7:0].

Sixteen pins

Up to two packets can be output per cycle. If there is only one valid packet, it is output on TRACEPKT[7:0], and TRACEPKT[15:8] is unknown. If there are two packets to output, the first is output on TRACEPKT[7:0] and the second on TRACEPKT[15:8].

An additional pin indicates the type of packet being output. TRACESYNC is HIGH on the first cycle of a PC address packet sequence. See Trace synchronization in ETMv1 for more information.

You must be aware of the rules used when outputting trace packets. These are described in Rules for generating and analyzing the trace in ETMv1.

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