3.9.4. Effect of DBGSWENABLE on register access

The ARM Debug Interface version 5 defines a signal, DBGSWENABLE, that can be used to disable access to some of the processor registers. If this interface is implemented, from ETMv3.2, then DBGSWENABLE has the following effects on accesses to the ETM registers:

To ensure that on-chip software can save and restore ETM registers, ARM recommends that DBGSWENABLE is held HIGH.

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