3.12.4. Coprocessor accesses, ETMv3.5, SinglePower

Table 3.104 shows coprocessor access permissions for SinglePower implementations in ETM v3.5. See ETM state definitions, ETMv3.5, SinglePower for the meanings of the column headings.

Table 3.104. Coprocessor accesses, ETMv3.5, SinglePower

 ETM state  
RegisterNo PowerNon-PrivilegedOtherwise
Trace registersNPossErrorOK[a]
ETMLSRNPossErrorunp
ETMLARNPossErrorunp
ETMPDSRNPossErrorunp
ETMOSLSRNPossErrorOK
ETMOSLARNPossErrorOK
ETMOSSRRNPossErrorunp
ETMDEVID, ETMAUTHSTATUSNPossErrorOK
ETMITCTRLNPossErrorunp
Other ManagementNPossErrorunp
Reserved TraceNPossErrorUNK/SBZP
Reserved ManagementNPossErrorunp

[a] When ETM_PD is 1, register writes to all Trace registers except certain bits of the ETMCR might be ignored


Copyright © 1999-2002, 2004-2009, 2011 ARM Limited. All rights reserved.ARM IHI 0014Q
Non-ConfidentialID101211