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| Home > Program Trace Macrocell Programmer’s Model > Event resources and PTM events > The PTM event resources | |||
A PTM event is identified by:
a 3-bit resource type value
a 4-bit index value, within the given resource type.
The 7-bit value obtained by concatenating a resource type and an associated index value is the resource number.
Table 3.5 shows the defined PTM resources. All combinations of resource type and index values not shown in the table are reserved.
Table 3.5. Event resource definitions
| Resource type | Index values [1] | Resource description | Number of resources of this type |
|---|---|---|---|
| b000 | 0-15 | Single address comparators 1-16 | Depends on number of SACs, 0-16 |
| b001 | 0-7 | Address range comparators 1-8 | Half the number of SACs, so 0-8 |
| 8-11 | Instrumentation resources 1-4 | Depends on number of Instrumentation resources, 0-4 | |
| b010 | 0-7 | EmbeddedICE watchpoint comparator inputs 1-8 | Depends on number of EmbeddedICE watchpoint comparator inputs, 0-8 |
| b100 | 0-3 | Counter 1-4 at zero | Depends on number of counters, 0-4 |
| b101 | 0-2 | Sequencer in state 1-3 | Three if sequencer implemented, otherwise none |
| 8-10 | Context ID comparators 1-3 | Depends on number of Context ID comparators, 0-3 | |
| 15 | TraceEnable start/stop resource | 0 or 1 | |
| b110 | 0-3 | External inputs 1-4 | Depends on number of external inputs, 0-4 |
| 8-11 | Extended external input selectors 1-4 | Depends on number of extended external input selectors, 0-4 | |
| 13 | Processor in Non-secure state | One, only if the processor implements the Security Extensions [2] | |
| 14 | Trace prohibited | One, always present | |
| 15 | Always TRUE | One, always present | |
[1] Index ranges show the maximum range. The actual range depends on the number of resources of that type implemented by the PTM. [2] This resource is not implemented if the processor does not implement the Security Extensions. | |||
The PTM uses the same event type and index value encodings as ETMv3.4. However, it does not support all of the event resources that are defined in the ETM specification.
How each event resource is asserted depends on the PTM feature that generates the resource. For example:
A SAC matches only for the single cycle when the comparison is made. Therefore, an SAC resource is TRUE only for that cycle.
An ARC matches until the next waypoint. Therefore, an ARC resource is TRUE until the next waypoint.
The behavior of an EmbeddedICE comparator resource depends on how you have programmed the EmbeddedICE Behavior Control Register for the corresponding comparator, see EmbeddedICE Behavior Control Register, ETMEIBCR.
An external input resource is TRUE when the corresponding input signal is asserted HIGH.
Some event resources are outputs from functional blocks of the PTM, such as the address comparators. Others act only as event resources. Table 3.6 shows where you can find more information about each of the event resources.
Table 3.6. Additional information about the PTM event resources
| Event resource | For more information, see |
|---|---|
| Single address comparators | Single address comparators (SACs) |
| Address range comparators | Address range comparators (ARCs) |
| Instrumentation resources | Instrumentation resources |
| EmbeddedICE comparator inputs | EmbeddedICE watchpoint comparator inputs |
| Counter at zero | PTM counters |
| Sequencer in state 1-3 | The PTM sequencer |
| Context ID comparators | Context ID comparators |
| TraceEnable start/stop resource | The TraceEnable start/stop block |
| External inputs | External inputs |
| Extended external inputs | Extended external inputs |
| Processor in Non-secure state | Non-secure state resource |
| Trace prohibited | Trace prohibited resource |
| Always TRUE | Hard-wired TRUE resource |