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| Home > Program Trace Macrocell Programmer’s Model > TraceEnable > TraceEnable rules | |||
TraceEnable can become active at any time. Usually, you use an address comparator to activate TraceEnable. This means the activation coincides with a waypoint, because address comparisons are performed only when a waypoint occurs. However, you can program the TraceEnable Event Register, so that any internal or external event activates TraceEnable, and the activation might not coincide with a waypoint.
Normally, when TraceEnable becomes active, tracing starts immediately, with the PTM generating an I-sync packet indicating the destination address of the last executed waypoint. The only cases where tracing does not start are:
the PTM is disabled, because ProgBit is set to 1
the processor is in Jazelle state
the processor is in Debug state, and has Halting debug-mode enabled
the processor is signaling that tracing is not permitted.
If an event activates TraceEnable between two waypoints, this change only takes effect at the next waypoint. When the processor executes the next waypoint, the PTM starts generating trace.
Normally, TraceEnable can become inactive only at a waypoint. This guarantees that the PTM traces the block of instructions from one waypoint to the next. The only exceptions to this, where the PTM stops tracing immediately, are:
You set ProgBit to 1, disabling the PTM.
You set the OS lock.
The PTM is powered down. Usually this happens because
the processor executes a WFI or WFE instruction.
A general rule for using TraceEnable is that, if two waypoints define the start and end of a block of instructions and you need to trace any instructions in that block, then you must trace the whole block.