3.16.23. About the Context ID comparator registers

A PTM can implement up to three Context ID comparators. The PTM implements a value register for each Context ID comparator, and a single mask register that applies to all of the Context ID comparators. Table 3.39 shows these registers.

Table 3.39. Summary of the Context ID comparator registers

DescriptionShort nameRegister numberOffset [a]
Context ID Comparator Value 1 RegisterETMCIDCVR10x06C0x1B0
Context ID Comparator Value 2 RegisterETMCIDCVR20x06D0x1B4
Context ID Comparator Value 3 RegisterETMCIDCVR30x06E0x1B8
Context ID Comparator Mask RegisterETMCIDCMR0x06F0x1BC

[a] Register offset where the registers are accessed in a memory-mapped scheme. The register offset is always 4 × (Register number).

The following sections describe these registers:

Copyright © 1999-2002, 2004-2008, 2011 ARM. All rights reserved.ARM IHI 0035B