3.16.2. Configuration Code Register, ETMCCR

The ETMCCR characteristics are:

Purpose

Enables software to read the implementation defined configuration of the PTM, giving the number of each type of resource. Where a value indicates the number of instances of a particular resource, zero indicates that there are no implemented resources of that resource type.

Usage constraints

There are no usage constraints.

Configurations

Available in all PTM implementations.

Attributes

See the register summary in Table 3.16.

Figure 3.13 shows the ETMCCR bit assignments.

Figure 3.13. ETMCCR bit assignments

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Table 3.18 shows the ETMCCR bit assignments.

Table 3.18. ETMCCR bit assignments

Bits

Maximum value

Description

[31]

1

This bit is Read-as-One, indicating that the ETMIDR is present and defines the PFT architecture version in use. For more information see ID Register, ETMIDR.

[30:28]

-

Reserved, SBZP.

[27]

1

This bit is Read-as-One, indicating that the PTM supports software accesses to the PTM registers. See Accessing the PTM registers.

[26]

1

This bit indicates whether the trace start/stop block is present:

0

Trace start/stop block not implemented.

1

Trace start/stop block implemented.

If no address comparators are implemented, this bit is RAZ.

[25:24]

3

The number of Context ID comparators implemented.

[23]

1

This bit indicates whether the FIFOFULL logic is present:

0

FIFOFULL logic not implemented.

1

FIFOFULL logic implemented.

Note

You can use FIFOFULL only if it is supported by both your PTM and your system. Some processors do not support FIFOFULL, so it cannot be used by the system. Therefore, a debugger must consider this bit in conjunction with bit [8] of the System Configuration Register, ETMSCR, of the processor connected to the PTM.

If this bit is 0, the FIFOFULL Region Register, 0x00A, is not implemented and is Reserved, RAZ. In this case, the Processor stall bit, bit [7], of the ETMCR is RAZ/WI.

[22:20]

4

The number of external outputs, supplied by the ASIC. A system that includes a PTM might not connect all of the external outputs provided by the PTM. This field indicates the number of connected external outputs.

[19:17]

4

The number of external inputs, supplied by the ASIC. A system that includes a PTM might not connect all of the external inputs provided by the PTM. This field indicates the number of connected external inputs.

[16]

1

This bit indicates whether the sequencer is present:

0

Sequencer not implemented.

1

Sequencer implemented.

[15:13]

4

The number of counters.

[12:4]

-

Reserved, SBZP.

[3:0]

8

The number of pairs of address comparators.


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