3.16.20. Sequencer State Transition Event Registers, ETMSQabEVR

The ETMSQabEVR characteristics are:

Purpose

ETMSQabEVR defines the event that causes the sequencer to transition from state a to state b.

Usage constraints

There are no usage constraints.

Configurations

Whether the PTM includes a sequencer is implementation defined, and is specified by ETMCCR bit [16]. See Configuration Code Register, ETMCCR.

If the PTM does not include a sequencer the ETMSQabEVRs are RAZ/WI.

Attributes

See the register summary in Table 3.16.

Figure 3.28 shows the ETMSQabEVR bit assignments.

Figure 3.28. ETMSQabEVR bit assignments

To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.


Table 3.36 shows the ETMSQabEVR bit assignments.

Table 3.36. ETMSQabEVR bit assignments

Bits

Description

[31:17]Reserved

[16:0]

Sequencer state transition event. Subdivided as:

Function, bits [16:14]

Specifies the logical operation that combines the two resources that define the event.

Resource B, bits [13:7] and Resource A, bits [6:0]

Specify the two resources that are combined by the logical operation specified by the Function field.

For more information see Event resources and PTM events.


Each ETMSQabEVR has the same bit assignments. Table 3.35 shows all of the ETMSQabEVRs.

Defining a PTM event describes how you define a sequencer state transition event.

Copyright © 1999-2002, 2004-2008, 2011 ARM. All rights reserved.ARM IHI 0035B
Non-ConfidentialID060811