3.16.9. TraceEnable Control Register, ETMTECR1

The ETMTECR1 characteristics are:

Purpose
  • enables the start/stop logic

  • determines whether the resources specified in this register are used for include or exclude control

  • specifies the address range comparators used for include/exclude control.

Usage constraints

There are no usage constraints.

Configurations

Available in all PTM implementations.

Attributes

See the register summary in Table 3.16.

Figure 3.19 shows the ETMTECR1 bit assignments.

Figure 3.19. ETMTECR1 bit assignments

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Table 3.24 shows the ETMTECR1 bit assignments.

Table 3.24. ETMTECR1 bit assignments

Bits

Description

[31:26]Reserved, SBZP.

[25]

Trace start/stop control enable. The possible values of this bit are:

0

Tracing is unaffected by the trace start/stop logic.

1

Tracing is controlled by the trace on and off addresses configured for the trace start/stop logic. See The TraceEnable start/stop block.

The trace start/stop event resource, resource 0x5F, is not affected by the value of this bit.

[24]

Include/exclude control. The possible values of this bit are:

0

Include. The specified address range comparators indicate the regions where tracing can occur. When outside this region tracing is prevented.

1

Exclude. The specified address range comparators indicate regions to be excluded from the trace. When outside an exclude region, tracing can occur.

[23:8]

Reserved, SBZP.

[7:0]

When a bit is set to 1, it selects an address range comparator, 8-1, for include/exclude control. For example, bit [0] set to 1 selects address range comparator 1.


Tracing all memory

To trace all memory:

  • set bit [24] in the ETMTECR1 to 1

  • set all other bits in the ETMTECR1 to 0

  • set the ETMTEEVER to 0x6F (TRUE).

This has the effect of excluding nothing, that is, tracing everything.

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