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The ETMSCR characteristics are:
Shows the PTM features supported by the PTM. The contents of this register are based on inputs provided by the ASIC.
There are no usage constraints.
Available in all PTM implementations.
See the register summary in Table 3.16.
Figure 3.16 shows the ETMSCR bit assignments.
Table 3.21 shows the ETMSCR bit assignments.
Table 3.21. ETMSCR bit assignments
Bits | Description |
|---|---|
| [31:15] | Reserved, SBZP. |
| [14:12] | Number of supported processors minus 1. The value given here is the maximum value that can be written to bits [27:25] of the ETMCR. |
| [11:9] | Reserved, SBZP. |
[8] | If set to 1, FIFOFULL is supported. This bit is used in conjunction with bit [23] of the ETMCCR. NoteYou can use FIFOFULL only if it is supported by both your PTM and your system. Some processors do not support FIFOFULL, so it cannot be used by the system. |
[7:0] | Reserved, SBZP. |